Getting Started

Calyx is an intermediate language and infrastructure for building compilers that generate custom hardware accelerators. These instructions will help you set up the Calyx compiler and associated tools. By the end, you should be able to compile and simulate hardware designs generated by Calyx.

Compiler Installation

There are three possible ways to install Calyx, depending on your goals.

Using the Docker Container

The easiest way is to use the Calyx Docker container container that provides a pinned version of the compiler, all frontends, as well as configuration for several tools.

The following commands will build the docker container for you and run it in an interactive shell:

docker pull ghcr.io/cucapra/calyx:latest
docker run -it --rm ghcr.io/cucapra/calyx:latest

The --rm flag will remove the container after you exit the shell. If you want to keep the container around, remove the flag.

Just to make sure that all's well with your Docker image, run the core tests:

runt -i core

If all this worked out, you're in great shape. You can skip a lot of what follows and head to running a hardware design.

Installing the Crate (to use, but not extend, Calyx)

First, install Rust. This should automatically install cargo.

If you want just to play with the compiler, install the calyx crate:

cargo install calyx

This will install the calyx binary which can optimize and compile Calyx programs. You will still need the primitives/core.futil and its accompanying Verilog file library to compile most programs.

Installing from Source (to use and extend Calyx)

First, install Rust. This should automatically install cargo.

Clone the repository:

git clone https://github.com/cucapra/calyx.git

Then build the compiler:

cargo build

You can build and run the compiler with:

cargo build # Builds the compiler
./target/debug/calyx --help # Executes the compiler binary

Running Core Tests

The core test suite tests the Calyx compiler's various passes. Install the following tools:

  1. runt hosts our testing infrastructure. Install with: cargo install runt
  2. jq is a command-line JSON processor. Install with:
    • Ubuntu: sudo apt install jq
    • Mac: brew install jq
    • Other platforms: JQ installation

Build the compiler:

cargo build

Then run the core tests with:

runt -i core

If everything has been installed correctly, this should not produce any failing tests.

Installing the Command-Line Driver

The Calyx driver wraps the various compiler frontends and backends to simplify running Calyx programs.

Install Flit:

pip3 install flit

Install fud (from the root of the repository):

flit -f fud/pyproject.toml install -s --deps production

Configure fud:

fud config --create global.root <full path to Calyx repository>

Check the fud configuration:

fud check

fud will report certain tools are not available. This is expected.

Simulation

There are three ways to run Calyx programs: Verilator, Icarus Verilog, and Calyx's native interpreter. You'll want to set up at least one of these options so you can try out your code.

Icarus Verilog is an easy way to get started on most platforms. On a Mac, you can install it via Homebrew by typing brew install icarus-verilog. On Ubuntu, install from source. Then install the relevant fud support by running:

fud register icarus-verilog -p fud/icarus/icarus.py

Type fud check to make sure the new stage is working. Some missing tools are again expected; just pay attention to the report for stages.icarus-verilog.exec.

It is worth saying a little about the alternatives. You could consider:

  1. Setting up Verilator for faster performance, which is good for long-running simulations.
  2. Using the interpreter to avoid RTL simulation altogether.

Running a Hardware Design

You're all set to run a Calyx hardware design now. Run the following command:

fud e examples/tutorial/language-tutorial-iterate.futil \
  -s verilog.data examples/tutorial/data.json \
  --to dat --through icarus-verilog -v

(Change the last bit to --through verilog to use Verilator instead.)

This command will compile examples/tutorial/language-tutorial-iterate.futil to Verilog using the Calyx compiler, simulate the design using the data in examples/tutorial/data.json, and generate a JSON representation of the final memory state.

Congratulations! You've simulated your first hardware design with Calyx.

Where to go next?